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| ELAN MICROELECTRONICS CORPORATION EM92547A/B/D CALLER ID FSK DECODER ELAN MICROELECTRONICS CORP. Office : 6-F1.,42, Sec.2, Chung Shaan N. Road., Taipei, Taiwan, R.O.C. TEL : (02) 5628813 EXT.686,687;5223065 FAX : (02) 5516348 TELEX : 21540 HTC, 22486 EHSIN 7F-1, No. 9 Prosperity 1st Rd. Science-Based Industrial Park. Hsin Chu City. Taiwan, R.O.C. TEL : (03) 5787505 FAX : (03) 5779095 Agent : Publication Release Date : EM92547A/B/D CALLER ID FSK DECODER General Description The EM92547 is a single-chip CMOS receiver IC designed to work in telephone equipment incorporating Calling Number Delivery (CND) capabilities. CND capabilities can be add to equipment such as telephone, adjunct units, answering machines, and facsimile machines, by using the EM92547 and any standard microcontroller IC. The EM92547 detects and qualifies the incoming ring signal, performs an energy detect on incoming FSK signal, and demodulates the FSK data in accordance with BELL 202 standards. Integrating the above functions the equipment manufacturer a cost-effective means of implementing CND capabilities into their products. Features * Compatible with Bellcore GR-30-CORE (formerly as TR-NWT-000030). * Compatible with British Telecom (BT) SIN227 & SIN242. * FSK demodulator for Bell 202 and ITU-T V.23 (formerly as CCITT V.23) * On-chip ring detector * Ring detect and carrier detect output for MCU interrupt * Power down mode operation * On-chip band pass filter * FSK demodulation with energy detect * High input sensitivity * Low current consumption in power down mode * Single supply from 3.5V to 6V * Clock Frequencies: 3.58MHz or 455KHz for EM92547A * : 3.58MHz for EM92547B/D Package series --- 16-pin DIP or 16-pin SOP (150 mil) EM92547BP/DP for 16-pin DIP EM92547BN/DN for 16-pin SOP (150 mil) Application * adjunct units * answering machines * feature phones * fax machines * computer interface products ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~1~ EM92547A/B/D CALLER ID FSK DECODER Pin Assignments EM92547A TIP RING RING DET1 RING DET2 NC RING TIME PWR UP DVSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD SHORTDATA DATA OUT CD RD CLK SELECT OSCIN OSCOUT TIP RING RING DET1 RING DET2 NC RING TIME PWR UP DVSS 1 2 3 4 5 6 7 8 EM92547B 16 15 14 13 12 11 10 9 VDD NC DATA OUT CD RD NC OSCIN OSCOUT EM92547D TIP RING RING DET1 RING DET2 NC RING TIME PWR UP DVSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD SHORTDATA DATA OUT CD RD NC OSCIN OSCOUT Functional Block Diagram Data Valid Energy Det Circuit Data Retiming DATAOUT /CD Tip Ring Band Pass Filter FSK Demod Ring det1 Ring det2 /Ring Time /PWR UP Ring Det. Circuit Power Up SHORTDATA /RD OSCIN OSCOUT Clock ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~2~ EM92547A/B/D CALLER ID FSK DECODER Pin Descriptions Symbol TIP RING RING DET1 RING DET2 SHORTDATA /RING TIME I/O I I I I O O Function This input is connected to the tip line of the twisted pair. This input is connected to the ring line of the twisted pair. This input is coupled to one end of the line through an attenuation network. It is used to detect the occurrence of a valid ring signal. This input is coupled to the other end of the line through an attenuation network. Data output pin without preamble message. A RC network should be connected to this pin. The RC time constant is chosen to hold this pin voltage below 2.2V between the peaks of the ringing signal. This active low input sets the chip into power up. When high, the chip is put into a power down mode in the absence of a ring signal. In this mode, only the ring detect circuitry is active. Ground. This pin connects to the other side of the crystal oscillator. This pin connects to 3.58MHz crystal oscillator or 455kHz resonator. It can also be used as an external clock input. A logic '1' on this pin to select 3.58MHz crystal oscillator, logic '0' to select 455kHz resonator. (ring detector)(active low)This output detects the presence of a valid ring signal. (carrier detect)(active low)This output indicates the presence of in-band signals at the device input. The demodulated FSK data is output to this pin. Power Supply Voltage. Non Connected. /PWR UP I VSS OSCOUT OSCIN CLK SELECT /RD /CD DATA OUT VDD NC O I I O O O Function Descriptions The EM92547 is a CMOS device designed to support the Caller Number Deliver feature, which is offered by the Regional Bell Operating Companies. The EM92547 CLID comprises two paths: the signal path and the ring indicator path. The signal path consists of an input differential buffer; a band pass filter, an FSK demodulator and a data valid with carrier detect circuit. The ring detector path includes a clock generator, a ring detect circuit and a power-up logic circuit. In a typical application, the ring detector maintains the line continuously while all other functions of the chip are inhibited. If a ring signal is sent, the ring detector wakes up the oscillator and the main bias generator. This in turn activates the rest of the IC. Once activated, a valid signal RI (ring indicator) is sent. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~3~ EM92547A/B/D CALLER ID FSK DECODER A /PWR UP input pin is provided to activate the chip regardless of the presence of a power ring signal. If /PWR UP is sent high, the IC can still power itself up whenever it detects a valid ring signal, but will back to its normal power-down mode after a time period. The input buffer accepts a differential AC coupled input signal through the TIP and RING input and feeds this signal to a band pass filter. Once the signal is filtered, the FSK demodulator decodes the information and sents it to a post filter. The output data is then made available at DATA OUT pin. This data, as sent by the central office, includes the header information (alternate "1" and "0") and 150msec of marking which precedes the date, time and calling number. If no data is present, the DATA OUT pin is held in a low state. This is accomplished by a carrier detect circuit which determines if the in-band energy is high enough. If the incoming signal is valid and thus the demodulated data is transferred to DATA OUT pin. If it is not, then the FSK demodulator is blocked. This device uses a 3.58 MHz crystal or a 455KHz(for EM92547A only) resonator as a timing source for all the internal blocks. * Ring detect circuit When Vdd is applied to the circuit, the RC network will charge cap C1 to Vdd /PWR UP VDD R1 /Ring Time C1 (form bridge) R2 Ring det1 R3 Power Up Logic Ring det2 R4 1.2V Ring Counter /RD holding /RING TIME off. If /PWRUP is also held at Vdd, the whole circuit will be in a power down mode, and will consume less than 1uA of supply current. The resistor network R2 to R4 attenuates the incoming power ring applied to the top of R2. The values given have been chosen to provide a sufficient voltage at pin3, to turn on the Schmitt trigger input. When Vt+ of the Schmitt is exceeded, cap C1 will discharge. This will initialize a partial power up, and enable the ring detect circuit. The value of R1 and C1 must be chosen to hold the /RING TIME pin voltage below the Vt+ of the Schmitt between the individual cycle of the power ring. The values shown will work for ring frequencies of 15.3 Hz minimum. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~4~ EM92547A/B/D CALLER ID FSK DECODER With pin4 enabled, a portion of the power ring above 1.2V is fed to the ring counter circuit. This circuit is a digital integrator. When the input signal at pin4 is above 1.2V,the integrator is counting up at 800 Hz rate. Otherwise, counting down at 800Hz rate. A ring is qualified when an internal count of binary 48 is reached and disqualified when an internal count below binary 48. Once the ring signal is qualified, the /RING INDICATOR will sent low. This can be fed back to /PWR UP or can be used as an interrupt to an MCU. Once the /PWR UP pin is below Vt-, the part will fully powered up, and ready to receive FSK. During this mode the device current will increase to 3 mA typical. * power up circuit /PWR UP WAKE UP RING DETECT /RD CLOCK GEN XTRL The power up circuit accepts /PWR UP signal and /RD signal. In the power down mode, if a ring signal is sent, the ring detector wakes up the oscillator and the main bias generator. This in turn activates the IC. Once activated, a valid signal RD (ring detector) is sent. Since no valid FSK single being detected, the whole IC will back to its power-down mode after a period (default 3-second). FSK data output(DATA OUT pin), FSK short data output(SHORTDATA) ,and FSK carrier detect (/CD) : As shown from functional block diagram, DATA OUT pin won't have any FSK decoding data until `Data Valid Energy Detect Circuit' has detected enough energy and timing (about 15ms) FSK signal coming. When this timing has been checked correctly, open-drain carrier detect /CD pin will be pull low then DATA OUT pin will have decoding data output. At this time, SHORTDATA pin will still not have any FSK decoding data until enough energy and timing (about 12.5ms) FSK mark bits time have been checked. The details timing about DATAOUT, SHORTDATA and /CD will be shown on Timing Diagram for FSK timing. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~5~ EM92547A/B/D CALLER ID FSK DECODER Absolute Maximum Ratings Rating Symbol DC supply voltage VDD Input voltage VIN DC current drain per pin I Power dissipation PD Operating temperature range TA Value -0.5.5 to 6 -0.5 to VDD +0.5 10 20 0 to 70 Unit V V mA mW C DC Electrical Characteristic (Referenced to VDD=5V VSS=0V) Parameter Symbol Min. Typ. Max. DC supply voltage VDD 3.5 5 5.5 Supply current(output pins unload) /pwr IDD -3 5 up =1 Xtal=3.58MHz Supply current (output pins unload) /pwr IDD -3 5 up =0 /ring time=0 Xtal=3.58MHz Standby current(output pins unload) /ring Istby --1 time =1 /pwr up =1 Input voltage '0' level Vil --VDDx0.3 Input voltage '1' level Vih VDDx0.7 --Output voltage high Ioh=0.16 mA Voh 2.5 --Ouput voltage low Iol=2.0 mA Vol -0.3 0.4 Input leakage current Iin --+/-1 Input threshold voltage positive going Vt+ TBD 2.9 TBD Input threshold voltage negative going VtTBD 2.2 TBD Ring det2 threshold Rd2Vt TBD 1.2 TBD Tip/Ring input DC resistance Rin -500 -unit V mA mA uA V V V V uA V V V k AC Electrical Characteristic (VDD=+5V,TA=+25C) Characteristics Input sensitivity TIP and RING Pin1 and pin2 VDD=+5V Band Pass FilterFrequence response(relative to 1700Hz @ 0 dBm) 60Hz 550Hz 2700Hz U 3 300Hz Energy detect sensitivity Min. -35 Typ. -48 Max -Unit dBm ------ -58 -3 -3 -30 -44 ------ dBm ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~6~ EM92547A/B/D CALLER ID FSK DECODER Timing Diagrams Description Symbol Min. OSC start up TOSC -Carrier detect low TCDL 10 DATA OUT to Carrier det low TDOC -SHORTDATA to mark det valid TSDV 10 Power up low to FSK(setup time) TSUP -End of FSK to Carrier Detect high TCDH 25 Typ. Max. Unit 2 4 ms 15 20 ms 10 20 ns 12.5 15 Ms 15 20 ms 30 35 ms FSK format There are some differences on signal spec. between Bell 202 and ITU-T V.23. Item Bell 202 ITU-T V.23 Mark freq. (logic 1) 12001% 13001.5% Space freq. (logic 0) 22001% 21001.5% Transmission rate 1200 bps 1200 bps Data format serial, asynchronous serial, asynchronous Modulation type analog phase coherent FSK analog phase coherent FSK FSK timing (`CS' -- Channel Seizure, `M' -- Mark, FSK data -- FSK data signal) 1. DATA OUT timing On-hook FSK : FIRST RING 2 SECONDS TIP/RING 0.5 SEC 0.5 SEC SECOND RING 2 SECONDS CS M FSK data /RING TIME /RD TCDL /CD TDOC DATA OUT TOSC OSC T SUP /PWUP 1010.. 1 TCDH DATA 3.58MHz ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~7~ EM92547A/B/D CALLER ID FSK DECODER Off-hook FSK : TIP/RING M TCDL FSK data TCDH /CD TDOC DATA OUT TOSC OSC 1 DATA 3.58MHz /PWUP 2. SHORTDATA timing On-hook FSK : FIRST RING 2 SECONDS TIP/RING CS M FSK data SECOND RING 2 SECONDS 0.5 SEC 0.5 SEC /RING TIME /RD TCDL /CD TSDV SHORTDATA TOSC OSC T SUP /PWUP 1 TCDH DATA 3.58MHz ps. Typically, on-hook FSK signal has to be at least TCDL = 15ms of Channel Seizure time and TSDV = 12.5ms of Mark bits time for SHORTDATA timing detected valid. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~8~ EM92547A/B/D CALLER ID FSK DECODER Off-hook FSK : TIP/RING M TCDL FSK data TCDH /CD TSDV SHORTDATA TOSC OSC 1 DATA 3.58MHz /PWUP ps. Typically, off-hook FSK signal has to be at least `TCDL + TSDV = 15ms + 12.5ms = 17.5 ms' of Mark bits time for SHORTDATA timing detected valid. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~9~ EM92547A/B/D CALLER ID FSK DECODER Application Circuit EM92547A : 4700p 4700p TIP 0.1u 250V 30k Vdd 30k 0.1uF EM92547A Tip 1 16 Vdd Ring 2 47k 14 DATA OUT Ring det1 3 13 /CD /RD Ring det2 4 12 /Ring time 6 NC 5 11 CLK SELECT Vdd /PWR UP 7 10 OSCIN Vdd VSS 8 9 OSCOUT 270k 0.1u 250V 470k 0.22u 47k RING 18k 15k 8-bit MCU 3.58M 1M 33p 33p LCD DISPLAY EM92547B : Vdd 30k 0.1uF 4700p 4700p TIP 0.1u 250V 30k EM92547B Tip 1 16 Vdd Ring 2 14 DATA OUT Ring det1 3 13 /CD Ring det2 4 12 /RD /Ring time 6 NC 5 11 NC /PWR UP 7 10 OSCIN Vdd VSS 8 9 OSCOUT 270k 47k 47k RING 0.1u 250V 470k 18k 0.22u 15k 8-bit MCU 3.58M 1M 33p 33p LCD DISPLAY ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~ 10 ~ EM92547A/B/D CALLER ID FSK DECODER EM92547D : Vdd 30k 0.1uF 4700p 4700p TIP 0.1u 250V 30k EM92547D Tip 1 16 Vdd Ring 2 15 SHORTDATA Ring det1 3 13 /CD Ring det2 4 12 /RD /Ring time 6 NC 5 11 NC /PWR UP 7 10 OSCIN Vdd VSS 8 9 OSCOUT 270k 47k 47k RING 0.1u 250V 470k 18k 0.22u 15k 8-bit MCU 3.58M 1M 33p 33p LCD DISPLAY ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~ 11 ~ EM92547A/B/D CALLER ID FSK DECODER Application Note 1. Input capacitor and input resistor C1 TIP R1 Differential Input OP Amp A 500k RING C2 R2 B 500k Input voltage of OP Amp are "A" and "B" which are equal to 500k/(Z1+500k) and 500k/(Z2+500k), where Z1=Zc1+R1, Z2=Zc2+R2. There is no difference in the input sensitivity when the external resistors R1 and R2 is more less than 500k ohms. Although R1 and R2 will not critically effect input sensitivity, we suggest the value of R1 and R2 are 30k to 50k to reduce the ring current into "A" and "B" for stable operation. Input coupling capacitors C1 and C2 will slightly effect the input sensitivity. The value of C1 and C2 could not choose too large to avoid ring voltage discharge time debiasing OP Amp. We suggest that the value C1 and C2 are less than 0.01uF. 2. VDD pin and VSS pin To reduce noise effects, connect a ceramic capacitor of about 0.1uF set as close as possible to the pin to the VSS pin. 3. OSCIN pin, OSCOUT pin For proper oscillator working, the feedback resistor 1M should be shunt with the 3.58MHz crystal and 20pF capacitors connected from these two pins to the ground. ________________________________________________________________________________________________________________________________________________________ * This specification are subject to be changed without notice. 1998 ~ 12 ~ |
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